Clock tick interrupt configuration method and apparatus

ABSTRACT

A method and an apparatus for setting a time for a tick interrupt are disclosed. The method includes performing a compensation for a system time when a tick interrupt is executed; setting a time of a next tick interrupt according to a timeout task and a compensated system time if the timeout task exists when the tick interrupt is executed; and when a system enters into a low power mode after the tick interrupt is executed, correcting the time of the next tick interrupt according to the timeout task that is updated when the low power mode is entered. The present disclosure can decouple logic relationships between tick interrupts and Idle tasks, thereby reduces the number of division operations that involve rounding, reduces such accumulated error associated with compensation time, and improves the accuracy of the system time, as compared to the existing technologies.

CROSS REFERENCE TO RELATED PATENT APPLICATIONS

This application claims priority to and is a continuation of PCT PatentApplication No. PCT/CN2018/092144 filed on 21 Jun. 2018, and is relatedto and claims priority to Chinese Application No. 201710500927.5, filedon 27 Jun. 2017 and entitled “Clock Tick Interrupt Configuration Methodand Apparatus,” which are hereby incorporated by reference in theirentirety.

TECHNICAL FIELD

The present disclosure relates to the technical field of computers, andparticularly to clock tick interrupt configuration methods andapparatuses.

BACKGROUND

With the development of technology, an increasing amount of attention isbeing paid to low power consumption requirements of RTOS (Real TimeOperating System) systems. At first, low-power design ideas thereof areas follows: 1. Enter into a low-power mode when an Idle task is running;2. Wake up an MCU (Microprogrammed Control Unit, an essence thereofbeing a single-chip device, which refers to integrating a CPU, a RAM, aROM, a timing counter, and various types of I/O interfaces of a computeronto a single chip to form a chip-level computer) through a tickinterrupt or an external event under an appropriate condition. An Idletask is a task having the lowest priority level in a system, and isexecuted when no other tasks are present. A tick interrupt is a timeslice benchmark of the system time.

FIG. 1 is a schematic diagram of task scheduling of the above system. InFIG. 1, the vertical axis is the task axis, and the horizontal axis isthe time axis, T1, T2, T3, and T4 are tick interrupts of fourequidistant time slices. As can be seen from FIG. 1, four idle periods,Idle1, Idle2, Idle3, and Idle4, exist among these five task schedules ofTaskA, TaskB, TaskC, TaskD, and TaskE. In order to reduce powerconsumption, an Idle task is in a low power mode during operation, andtick interrupts are generated at T1 and T4 positions during operationsof Idle1 and Idle4 to awaken the MCU, which enters into a low power modeafter waking up. Therefore, as can be seen from the second point, eachtime when a clock source counter of a RTOS system generates a tickinterrupt, the MCU will also wake up from the low power mode, and thenenters into the low power mode again. Awakening from the low power modemakes the MCU being unable to enter into a deep sleep, and this is alsounreasonable for low power consumption design.

In order to avoid the above situation, in existing technologies, thetime of a next tick interrupt is dynamically calculated and set in anIdle task. An execution process in the Idle task is: 1. Systempreemption is turned off; 2. The time for a next tick interrupt iscalculated and set based on the current system time; 3. A CPU (CentralProcessing Unit) sleeps, so that a MCU enters into a low power mode; 4.The CPU makes compensation for the system time after being woken up byany interrupt other than a tick interrupt; 5. The system preemption isturned on. After the system preemption is turned on, tasks with higherpriority levels can be executed.

In the above-mentioned scheme of dynamically calculating and setting thetime of a next tick interrupt in an Idle task in the existingtechnologies: any interrupt of a system other than a tick interrupt willwake up a MCU, and an action of time compensation is then performed.Such action of time compensation involves a division operation, whichinvolves rounding. If the system is interrupted frequently, an errorassociated with such time compensation will be very large, whichincreases the inaccuracy of the system time.

SUMMARY

This Summary is provided to introduce a selection of concepts in asimplified form that are further described below in the DetailedDescription. This Summary is not intended to identify all key featuresor essential features of the claimed subject matter, nor is it intendedto be used alone as an aid in determining the scope of the claimedsubject matter. The term “techniques,” for instance, may refer todevice(s), system(s), method(s) and/orprocessor-readable/computer-readable instructions as permitted by thecontext above and throughout the present disclosure.

The present disclosure provides methods, apparatuses, devices, andstorage media for setting a clock tick interrupt.

The present disclosure provides the following solutions.

Embodiments of the present disclosure provide a method for setting atime for a tick interrupt, which includes: performing a compensation fora system time when a tick interrupt is executed; setting a time of anext tick interrupt according to a timeout task and a compensated systemtime if the timeout task exists when the tick interrupt is executed; andwhen a system enters into a low power mode after the tick interrupt isexecuted, correcting the time of the next tick interrupt according tothe timeout task that is updated when the low power mode is entered.

The embodiments of the present disclosure provide a method for setting atime for a tick interrupt, which includes performing a compensation fora system time when a tick interrupt is executed; and setting a time fora next tick interrupt according to a timeout task and a compensatedsystem time is the timeout task exists when the tick interrupt isexecuted.

Correspondingly, the embodiments of the present disclosure provide anapparatus for setting a time for a tick interrupt, which includes: acompensation module configured to perform a compensation for a systemtime when a tick interrupt is executed; a first interrupt setting moduleconfigured to set a time of a next tick interrupt according to a timeouttask and a compensated system time if the timeout task exists when thetick interrupt is executed; and an interrupt correction moduleconfigured to correct, when a system enters into a low power mode afterthe tick interrupt is executed, the time of the next tick interruptaccording to the timeout task that is updated when the low power mode isentered.

Correspondingly, the embodiments of the present disclosure provide anapparatus for setting a time for a tick interrupt, which includes: acompensation module configured to perform a compensation for a systemtime when a tick interrupt is executed; and a first interrupt settingmodule configured to set a time for a next tick interrupt according to atimeout task and a compensated system time is the timeout task existswhen the tick interrupt is executed.

The embodiments of the present disclosure further provide a device,which includes: one or more processors; and in one or more computerreadable media storing instructions that, when executed by the one ormore processors, cause the device to perform the aforementioned methodsfor setting a time for a tick interrupt.

The embodiments of the present disclosure also provide one or morecomputer readable media storing instructions that, when executed by oneor more processors, cause a device to perform the aforementioned methodsfor setting a time for a tick interrupt.

According to specific embodiments provided by the present disclosure,the present disclosure discloses the following technical effects:

First, the entire solution is configured for tick interrupts of asystem. Therefore, the present disclosure decouples the tick interruptsof the system from Idle tasks. As such, any wake-ups caused byinterrupts other than tick interrupts will not trigger such action oftime compensation.

Second, relative to the solution of setting a time for a next tickinterrupt in an Idle task, the Idle task can only control a tickinterrupt in a current task cycle. For example, Idle1 in FIG. 1 can onlycontrol such tick interrupt of T1 at a start moment of Task B, andcannot control tick interrupts in the entire system globally. Thepresent disclosure for tick interrupts is a system-level dynamic ticksolution, which control tick interrupts of the entire system.

In summary, the above solution of the present disclosure proposesconcepts of dynamic tick at a system level, which dynamically sets atick interrupt of a system at the system level, decouples the tickinterrupt from an Idle task, and does not dynamically calculate a timefor a next tick interrupt in the Idle task. Therefore, the system'spreemption is not turned off, and frequent interruptions form interruptsother than tick interrupts do not occur. As such, there is no process ofsystem compensation every time when being interrupted and awake, thusreducing the number of times of performing compensation for the systemtime, which thereby reduces the number of division operations thatinvolve rounding, reduces such accumulated error associated withcompensation time, and improves the accuracy of the system time, ascompared to the existing technologies.

Apparently, any products implementing the present disclosure do notnecessarily require all of the above advantages to be accomplished atthe same time.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the embodiments of the technicalsolutions of the present disclosure or the existing technologies,drawings to be used with the embodiments are briefly described herein.Apparently, the described drawings merely represent some embodiments ofthe present disclosure. One skilled in the art can obtain other drawingsaccording to these drawings without making any creative effort.

FIG. 1 shows a diagram illustrating an example of tick interrupt in theexisting technologies.

FIGS. 2A-2F show a flowchart of a method for setting a time for a tickinterrupt provided by the embodiments of the present disclosure.

FIG. 3 shows a diagram illustrating an example of a tick interruptprovided by the embodiments of the present disclosure.

FIGS. 4A-4F show a flowchart of another method for setting a time for atick interrupt provided by the embodiments of the present disclosure.

FIG. 5 shows a structural block diagram of an apparatus for setting atime for a tick interrupt provided by the embodiments of the presentdisclosure.

FIG. 6 shows a structural block diagram of another apparatus for settinga time for a tick interrupt provided by the embodiments of the presentdisclosure.

DETAILED DESCRIPTION

The technical solutions shown in the exemplary implementations areclearly and completely described hereinafter with reference to thedrawings. Apparently, the described embodiments represent only a partand not all of the embodiments of the present disclosure. All otherembodiments obtained by one of ordinary skill in the art based on theembodiments of the present disclosure fall within the scope ofprotection of the present disclosure.

For a system, such as MCU, the number of ticks directly corresponds to asystem time, and the system time is calculated by a tick counter. Forexample, if a tick is 10 milliseconds, then 1 second is 100 ticks. Anysubsequent computations performed by the system needs to use the systemtime as a basis. Since the system may be in a sleep state, its tickcounter is in a stop counting state during a sleeping process.Therefore, it is necessary to perform a compensation for the system timeafter a tick interrupt, to make a compensation to a counter value thatthe tick counter needs to have reached during a process from the abovesleeping to being awakened.

The embodiments of the present disclosure are aimed at avoiding suchaction of time compensation that is performed for a system once a CPU isawakened up due to interrupts other than a tick interrupt of the systeminterrupting the sleep of a CPU and causing the system to leave a lowpower mode in the solution of setting a next tick interrupt in an Idletask in the existing technologies. Since the action of time compensationinvolves a division operation and also involves rounding. For example,if a clock frequency is 30 Mhz/s (megahertz per second), for counting ofa clock cycle, converting timer_counter to a number of ticks involves adivision operation. If timer_counter is 111111111, a conversion thereofinto a number of ticks is 111111111*( 1/30M)=5.55 . . . , and 6 ticksare obtained by rounding off the number. If the number of times that theCPU is awaken in an Idle task is too large, an error associated withtime compensation will be very large, resulting in inaccuracy of thesystem time, causing uncertainty in time, and affecting operations ofthe system.

Therefore, the present disclosure can perform the following actions ineach execution of a tick interrupt of a system: performing acompensation for a system time, and setting a time for a next tickinterrupt based on a compensated system time and timeout tasks having atimeout requirement when the timeout tasks exist in the system. Since anew timeout task having a timeout requirement may appear during aprocess of awakening by the system's timeout task, and in order tocomply with design ideas of a tick interrupt (i.e., the tick interruptis intended for a normal execution of a task), a situation in which aCPU sleeps and a timeout period of a task has past may occur if a sleepis directly entered after the tick interrupt without modifying a timefor a next tick interrupt. For example, a timeout period of a certainnew timeout task A is 1 second, but a tick time that is set in aprevious tick interrupt is 2 second. In this case, the timeout task Acannot be executed normally. In order to avoid this type of situation,it is necessary to set up an operation of correcting a time for a nexttick interrupt when the system enters a low power mode after anexecution of a tick interrupt based on a timeout task that is updatedwhen the low power mode is entered. This therefore decouples a tickinterrupt of the system from an Idle task, dynamically setting the tickinterrupt of the system at a system level, which controls tickinterrupts of the entire system, avoids time compensation caused byinterrupts other than the tick interrupts, thereby reducing the numberof times of time compensation, reducing an error associated with timecompensation, and improving the accuracy of a system time.

Terminologies that are used in implementations are described.

Clock cycle: a clock cycle determines an operating frequency of a CPU,such as 30 Mhz/s as described above, with 1 clock cycle as 1/30M.

Tick: a tick, i.e., a clock tick, with N clock cycles as a tick.

Timer_counter: a clock source counter, which counts clock cycles, havinga register address range as one cycle, for example, 32 bits from 0 to0xffffffff as one cycle.

Tick counter: record the number of ticks, with the number of tickscorresponding to a system time. For example, if one tick is 10milliseconds, then 1 second corresponds to 100 ticks, which cantherefore correspond to the system time.

Tick interrupt: Tick interrupt, a CPU is awaken after a tick interrupt,causing a system to leave a low power mode.

Tick interrupt counter: record the number of ticks is reached when aninterrupt is executed, and counting is cleared for counting of a nexttick interrupt.

Interrupts other than tick interrupts: interrupts generated by allnon-time peripherals such as keyboards, mice, and network interfaces.

Timeout task: a task that is not executed first, and is suspended towait for being awakened, having a timeout period. For example, if a taskwakes up after sleeping for 3 seconds, a timeout period thereof is 3seconds.

Low-power mode: a CPU goes to sleep, and a system enters a low-powermode.

Specific implementations are described in detail hereinafter.

First Embodiment

Referring to FIG. 2A, a flowchart of a method 200 for setting a time ofa tick interrupt is shown. The method 200 may include the followingoperations.

Operation 202: Perform a compensation for a system time when a tickinterrupt is executed.

In implementations, when a system starts, a time for a first tickinterrupt can be set according to needs. As such, each time when a tickinterrupt is executed, a system time needs to be compensated for thesake of the accuracy of the system time.

Moreover, the compensated system time is the basis for calculating thetime for the next tick interrupt, because the aforementioned tickcounter corresponding to the system time will stop counting if thesystem's CPU sleeps and enters the low power mode. In this case, inorder to ensure normal operations of the system, the system time needsto be compensated after the CPU is woken up. The time of the next tickinterrupt is calculated based on the compensated system time. If thetime of the next tick interrupt is not calculated using the compensatedsystem time, errors such as failure to timely wake up the CPU toprocessing tasks may occur.

In implementations, a time threshold may be set up in advance. The timeof the first tick interrupt is set as the time threshold. It can beunderstood that the time of the first tick interrupt is set to be thetime threshold at the time when the system is initiated.

It should be noted that, since a register address of a clock sourcecounter has a range in actual devices, for example, a register addressrange of a 32-bit clock source counter is from 0 to 0xffffffff, themaximum address corresponds to the maximum time. In this case, the timethreshold that is set cannot exceed the maximum time that can berecorded by the clock source counter, because the clock source counterstarts counting from 0 again after the maximum address is reached, whichcauses a tick time to be missed, resulting in an inaccurate system time.

Therefore, a counted address corresponding to the time threshold that isset in implementations is not greater than the total counted address ofthe clock source counter.

As such, if the time corresponding to the maximum address 0xffffffff is40 seconds, the time threshold cannot be greater than 40 second. Forexample, the time threshold can be set to be 10 seconds, and a countaddress corresponding to 10 seconds needs to be smaller than the maximumaddress 0xffffffff. It should be noted that a specific value of the timethreshold may be set within the time range corresponding to the maximumaddress, and is not limited by the embodiments of the presentdisclosure.

In this case, when the first interrupt is executed, compensation isstarted to be performed for the system time, and the time for a nexttick interrupt is then dynamically set. When each subsequent interruptis executed, the system time is also compensated, and the time for acorresponding next tick interrupt is dynamically set.

In implementations, operation 202 may include the following operationsas shown in FIG. 2B.

Operation 202-2: Obtain a number of sleep ticks of a tick counter forthe system time during a previous sleep, and a count value of a clocksource counter elapsed from a last sleep time to a current time.

Operation 202-4: Convert the count value of the clock source counterinto a number of compensation ticks, and add the number of compensationticks with the number of sleep ticks to obtain a number of ticks for acurrent system time.

Each time when the system enters the low power mode, its calculationprocess of the system time also stops. The system records a sleep systemtime of the last sleep time and records a count value of the clocksource counter at the sleep time at a specified position. As such, afterthe CPU sleeps and is then woken up by an immediate next tick interrupt,the sleep system time t1 of the last sleep time and the count value m ofthat time can be obtained in this wakeup of the interrupt. A currentcount value n of the clock source counter is then read, and a countvalue k that elapses from the last sleep to a current time is thenobtained by using m−n. This k is then converted to a compensation timet2 according to the clock frequency of the system, and t1+t2 is then thecurrent time of the system.

In practical applications of the present disclosure, the system time isrecorded using the tick counter. In this case, the tick counter is alsostopped when the CPU sleeps, for example, t1 times at this moment. Whenthe CPU wakes up, the value t1 of the tick counter at the time of thelast sleep is obtained. If the clock frequency is p1 (Mhz), then theabove reads k=[(m−n)/p1M], where the symbol “[ ]” represents a roundedvalue. Then, the value of the tick counter is corrected to k+t1 toobtain a compensated system time.

Apparently, the process of time compensation is merely an example, andother methods may be used for performing time compensation, which arenot limited by the embodiments of the present disclosure.

Operation 204: Set a time for a next tick interrupt according to atimeout task and a compensated system time if the timeout task existswhen the tick interrupt is executed.

It should be noted that, in practical applications, when the system hasa task that requires timeout, the timeout task is loaded into a timeoutlist. In this case, the present disclosure can set the time for the nexttick interrupt according to the timeout task in the timeout list.

It can be understood that if no timeout task exists when the tickinterrupt is executed, the time for the next tick interrupt is set to bethe above time threshold.

In implementations, operation 204 may include the following operationsas shown in FIG. 2C.

Operation 204-2: Obtain the shortest timeout period from among timeouttask(s) if the timeout task(s) exist(s) when the tick interrupt isexecuted.

Operation 204-4: Determine an interval time between a system timecorresponding to a time after the shortest timeout period and a systemtime after the compensation.

Operation 204-6: Set the time for the next tick interrupt according tothe interval time.

In implementations, a determination as to whether any timeout taskexists in the system is needed to be performed first. In order to ensurenormal operations of the system when no timeout task exists, a tickinterrupt needs to be performed even if no timeout task exists in thesystem. In this way, when no timeout task exists in the system, the timefor a next tick interrupt can be directly set to be the interruptthreshold.

When a timeout task exists in the system, the time for a next tickinterrupt needs to be configured in a current tick interrupt accordingto an interval time between a timeout period of the timeout task and acurrent interrupt time.

For example, five timeout tasks in FIG. 3 are Task A, Task B, Task C,Task D, and Task E. Task A has been executed after a wakeup by acorresponding tick interrupt T0 (not shown). When an interrupt time isset up in a previous tick interrupt in Task A, timeout periods ofsubsequent Task B, Task C, Task D, and Task E are considered. With anexample of 3 seconds, 5 seconds, 7 seconds, 9 seconds, and 20 secondsfor Task A, Task B, Task C, Task D, and Task E respectively, remainingtimeout tasks are Task B, Task C, Task D, and Task E after the T0interrupt in this case. At this time, the shortest timeout period is 5seconds.

According to a corresponding system time after a lapse of 5 seconds andan actual system time after a current compensation, a time interval isthen calculated. Simply put, it is a difference between the time for anext tick and the current system time. As such, in the absence of anyerror, the interval time of the above example is 5−3=2 seconds.Therefore, the time set for the T1 interrupt is 2 seconds with respectto the T0 interrupt. In practical applications, a tick interrupt settingfunction can be called to set the time for the tick interrupt time as 2seconds.

It should be noted that, since timeout tasks are mounted in a timeoutlist and timeout tasks in the timeout list are sorted according to anincreasing order of respective timeout periods, a time of a timeout taskat the head of the timeout list can be directly obtained to be theshortest timeout period in implementations.

Apparently, for other types of ordering of timeout tasks, the shortesttimeout period can also be obtained in a corresponding manner, and theembodiments of the present disclosure do not have any limitationsthereon.

For the tasks in the above timeout list, when the timeout task at thehead is awakened, the timeout task is removed from the head.

Apparently, the timeout tasks in implementations may also be placed inother types of timeout queues, which are not limited in implementations.

In implementations, operation 204-4 may include the following operationsas shown in FIG. 2D.

Operation S204-4-2: Obtain a system timeout period corresponding to thesystem time according to the shortest timeout period.

Operation S204-4-4: Subtract the compensated system time from the systemtimeout period, and obtain the interval time.

In implementations, when one or more timeout tasks exist, the shortesttimeout period is first obtained from among these tasks, and then theinterval time between the timeout period and the time for the currentinterrupt is calculated.

Apparently, in practical applications, in situations where a task havingthe shortest timeout period is placed in the head of the timeout list,after determining that a current timeout task in the head of the timeoutlist is not a previous timeout task at the head, this means that theprevious timeout task is awakened. In this case, the interval time forthe current timeout task at the head needs to be calculated. In otherwords, the present disclosure is to obtain a time interval between thetime when a timeout task is awakened and a current system time.

In implementations, for a timeout task newly received at the time ofwakeup, the timeout period is made to correspond to the system time forcompleting the timeout period, when the timeout is added to the timeoutlist when the sleep function is called. For example, the system timeduring sleep is 10 minutes and 10 seconds, and the timeout period of thenewly added timeout task is 5 seconds. Then the system timeout timecorresponding to the system time is 10 minutes and 15 seconds, whichmeans that the timeout task is awakened when the system time reaches 10minutes and 15 seconds.

For the foregoing example, for example, the time when the CPU sleeps is10 minutes and 10 seconds before T0, and the system time aftercompensation in the 0 interrupt is 10 minutes and 13 seconds. The systemtimeout time corresponding to the system time of Task B that is obtainedis 10 minutes and 15 seconds. In this case, the time interval that isobtained is 2 seconds, by subtracting 10 minutes and 13 seconds from the10 minutes and 15 seconds.

For example, before T1, the time when the CPU sleeps is 10 minutes and14 seconds, and the system time after compensation due to T1 interruptis 10 minutes and 15 seconds. The system timeout time of Task Ccorresponding to the system time that is obtained is 10 minutes and 17seconds. In this case, the time interval that is obtained is 2 seconds,by subtracting 10 minutes and 15 seconds from the 10 minutes and 17seconds. Other cases are done in a similar manner.

Apparently, in practical applications, the system time is counted by thenumber of ticks. For instance, the above examples of 10 minutes 15seconds and 10 minutes 13 seconds each corresponds to a respective tickvalue. As such, the above time interval is also a tick value.

Apparently, it should be noted that if timeout period(s) of timeouttask(s) in the timeout list is/are calculated and recorded according tosystem times, the timeout period(s) is/are system time(s) when beingawakened up. For example, the system time at the time of mountingthereon is 10 minutes 00 seconds, a sleep thereof takes 5 seconds, and atimeout period that is recorded is 10 minutes and 05 seconds. In thiscase, the timeout period can be directly obtained. When an interval timeis calculated, the current system time can be directly subtracted by thetimeout period, and this system time can be the time that has gonethrough time compensation after the aforementioned tick wakeup. Thespecific method of calculating an interval time is not limited inimplementations.

In implementations, operation 204-6 may include the following operationsas shown in FIG. 2E.

Operation 204-6-2: Determine whether the interval time is greater than atime threshold.

Operation 204-6-4: Set the time for the next tick interrupt to be thetime threshold if the interval time is greater than or equal to the timethreshold.

Operation 204-6-6: Set the time for the next tick interrupt to beinterval time if the timeout period is less than the time threshold.

For example, in the foregoing example of FIG. 3, if the system time is 0second when 3 seconds, 5 seconds, 7 seconds, 9 seconds, and 20 secondsare added to the timeout list, respective system times corresponding to3 seconds, 5 seconds, 7 seconds, 9 seconds, and 20 seconds are 3seconds, 5 seconds, 7 seconds, 9 seconds, and 20 seconds. When the T1interrupt is executed, the tasks in the timeout list are Task C, Task D,and Task E, the timeout periods are 7 seconds, 9 seconds, and 20 secondsrespectively. In this case, the shortest timeout period is 7 s. Theinterval time between the 7 s and the current interrupt is calculated tobe 7−5=2 seconds using the foregoing process. At this time, a firstdetermination is made that 2 seconds are less than 10 seconds. As such,the time for the next tick interrupt T2 of T1 is set to be 2 seconds.

Similarly, when the T2 interrupt is executed, there are also Task D andTask E, and the shortest timeout period is 9 seconds. The calculatedinterval time is 9−7 seconds=2 seconds, with 2 seconds being less than10 seconds. As such, the time for the next tick interrupt T3 in T2 isset to be 2 seconds.

When the T3 interrupt is executed, the timeout task also has Task E, andthe timeout time period is 20 s. The interval time for the time of thecurrent interrupt is 20−9=16 seconds. Since 16 seconds are greater than10 seconds, then the time for the next tick interrupt T4 is set to be 10seconds.

Then, when the T4 interrupt is executed, the timeout task also has TaskE, and the interval time is 20 s. The interval for the time of thecurrent interrupt is 20−19=6 seconds, and 6 seconds are less than 10seconds. As such, the time T5 in the T4 interrupt is set to be 6seconds.

In practical applications, after determining the time for the next tickinterrupt, such time can be converted into a count value L of the tickinterrupt counter. This count value L is then stored in a comparisonregister of the tick interrupt counter. An interrupt is generated if acount value of the tick interrupt counter is increased and matches thevalue recorded in the comparison register.

Apparently, in practical applications, since the system time is thenumber of counts of the tick counter, the time threshold is alsoconverted into a corresponding number of ticks. For example, if the tickperiod is 100 Hz, the time threshold of 10 seconds is 1000 times. Assuch, the time for the next tick is also a tick number. Therefore, atick interrupt counter may be set up, which is independent from the tickcounter and the clock source counter, to record whether the number ofticks reaches the number of times for the next tick interrupt. Ifreached, a tick interrupt is generated, and the tick interrupt counteris cleared to 0 for performing the next counting.

Operation 206: Perform a correction operation on the time of the nexttick interrupt according to updated timeout task(s) when a low powermode is entered when the system enters into the low power mode after thetick interrupt is executed.

During a wake-up of the system, various tasks may be processed, andvarious new timeout tasks are received. As such, the system will placethe newly received timeout tasks to the timeout list, and the time for atick interrupt is then needed to be corrected using updated timeouttasks. It is because if there is a timeout task that has a timeoutperiod that is shorter than the original shortest timeout period in thetimeout list, such timeout task cannot be woken up if the time of thetick interrupt is not corrected.

In implementations, operation 206 may include the following operationsas shown in FIG. 2F.

Operation 206-2: Correct, when the system enters into the low power modeafter the tick interrupt is executed and when a new timeout task existsand a corresponding timeout period is shorter than the shortest time oforiginal timeout tasks, the time for the next tick interrupt accordingto the shortest time of the new timeout task.

Operation 206-4: Maintain the time for the next tick interrupt when anew timeout task exists and a corresponding timeout period is notshorter than the shortest time of original timeout tasks, or when no newtimeout task exists.

It can be understood that when the system calls the sleep function tomake the CPU sleep, so that the system enters into the low power mode,new timeout task(s) is/are loaded into the timeout list, and the timeoutlist is reordered. The following situations may occur:

1. A timeout task of new timeout task(s) having a timeout period that isshorter than the original timeout period exists;

2. A timeout task of the new timeout task(s) having a timeout periodthat is the same as the original timeout period exists;

3. A timeout task of the new timeout task(s) having a timeout periodthat is longer than the original timeout period exists.

For 1, the time of the tick interrupt that is previously set needs to bemodified, and no modification needs to be performed for 2 and 3.Therefore, it can be understood that the above correction operation mayinclude two types of operations modifying and not processing.

Task C, Task D, and Task E in FIG. 3 are used as an example. At thispoint, the CPU is woken up to perform task TaskB. In this process, TaskM newly appears, and a timeout period of TaskM is 6 seconds. In thiscase, the timeout tasks in the timeout list are sorted according to timeinto TaskM (6 seconds), Task C (7 seconds), Task D (9 seconds), and Task(20 seconds). TaskM is 1 second earlier than the interrupt set by T1interrupt for the T2 interrupt of TaskC. Therefore, a tick interrupttime setting function is needed to be called at this time to change thetime of the T2 interrupt from 2 seconds to 1 second. In addition, if thetimeout period of TaskM is 7 seconds or more, this timeout period has noeffect on the time of T2 interrupt, so no modification is needed to beperformed thereon, and the time of T2 interrupt is not processed. Othercases are performed in a similar manner.

Apparently, the adjustment result of the above-mentioned sleep functionon the timeout list is merely an example, which is not limited inimplementations.

In practical applications, a sleep function can adjust a timeout list ina variety of ways, such as changing an initial timeout period of atimeout task that is inputted to a timeout period based on a startingtime point, such as TaskB, Task C, and Task E, using 0 second as theirstarting time points. If an initial sleep time requested by TaskM isactually 1 second for sleep, the timeout time period of TaskM thatstarts from 0 second is 5+1=6 second because the 5 seconds of TaskB arepast. In this way, the foregoing timeout list of TaskM (6 seconds), TaskC (7 seconds), Task D (9 seconds), and Task (20 seconds) is obtained.Apparently, the adjustment of the timeout list by the sleep function canalso remove the actual time that has elapsed for existing timeout tasks.For example, the actual sleep times of Task B, Task C, Task D, and TaskE are 5 seconds, 7 seconds, 9 seconds, and 20 seconds. When the T1interrupt is set, this means 5 seconds have elapsed. In this case, thesleep function can perform a reduction of the 5 seconds that elapse whenprocessing the timeout list. Therefore, the remaining timeout periods ofTask C, Task D and Task E are 2 seconds, 7 seconds and 15 secondsrespectively. At this time, after TaskM that actually sleeps for 1second is added, the timeout list is TaskM (1 second), Task C (2seconds), Task D (7 seconds), and Task (15 seconds). The presentdisclosure does not limit how a sleep function adjusts a timeout list,as long as timeout periods of timeout tasks are ensured to belong to asame reference system, thus ensuring that the time that a task isawakened satisfies its own requirements.

In implementations, when the sleep function is called, the timeoutperiods of the original timeout tasks in the timeout list are notchanged. For a new timeout task that occurs before sleep, it is insertedinto the timeout list according to the actual time that it needs to beawakened. For example, a timeout task is received in a wake-up statebefore sleep, and this timeout task requests to be woken up at 5 secondsafter sleep. In this case, the sleep function adds this task into thetimeout list, and records its timeout period as 5 seconds in the list.In addition, because the tick needs to be corrected, the system timecorresponding to the timeout period of the new timeout task is obtained.For example, the system time when sleep is 10 minutes and 30 seconds,and the system time corresponding to the timeout period is 10 minutesand 35 seconds in this case.

Through the above solutions of the embodiments of the presentdisclosure, the following advantages are obtained:

First, the entire solution is configured for tick interrupts of asystem. Therefore, the present disclosure decouples the tick interruptsof the system from Idle tasks. As such, any wake-ups caused byinterrupts other than tick interrupts will not trigger such action oftime compensation.

Second, relative to the solution of setting a time for a next tickinterrupt in an Idle task, the Idle task can only control a tickinterrupt in a current task cycle. For example, Idle1 in FIG. 1 can onlycontrol such tick interrupt of T1 at a start moment of Task B, andcannot control tick interrupts in the entire system globally. Thepresent disclosure for tick interrupts is a system-level dynamic ticksolution, which control tick interrupts of the entire system.

Moreover, as compared with the existing technologies, a process of timecompensation in an Idle task involves the Idle task, a CPU and othertasks, having a very complicated processing logic. As such, a statementof execution is complicated, and an execution time is long. Furthermore,because preemption is turned off, Idle tasks are the lowestpriority-level tasks, and therefore high-priority-level tasks are notscheduled, which affects real-time performance. A tick interrupt of thepresent disclosure is decoupled from an Idle task, and a timecompensation is made in the tick interrupt, instead of performing thetime compensation in the Idle task, having a simple processing logic.Therefore, the process of compensation in implementations is simple, andpreemption is not turned off, having a low real-time impact.

Moreover, after setting a next tick time in a tick interrupt of thepresent disclosure, when the system enters into a low power mode afterthe tick interrupt is executed, a correction operation is performed on atime for a next tick interrupt according to timeout task(s) that is/areupdated when the low power mode is entered, thus ensuring that the newlyadded task(s) can also be normally woken up by the tick interrupt toavoid system errors.

Second Embodiment

Referring to FIG. 4A, a flowchart of a tick interrupt time settingmethod 400 is illustrated. The method 400 may include the followingoperations.

Operation 402: Perform a compensation for a system time when a tickinterrupt is executed.

Operation 404: Set a time for a next tick interrupt according to atimeout task and a compensated system time if the timeout task existswhen the tick interrupt is executed.

The principles of operations 402 and 404 are similar to those ofoperations 202 and 204 of the first embodiment, and are not described indetail herein.

In implementations, the method may further include the followingoperation:

Operation 406: Correct, when a system enters a low power mode after thetick interrupt is executed, the time for the next tick interruptaccording to timeout task(s) that is/are updated when the low power modeis entered.

The principles of operation 406 are similar to those of operation 206 ofthe first embodiment, and are not described in detail herein.

This operation is to ensure that a newly added task can also be woken upnormally by a tick interrupt to avoid system errors.

In implementations, operation 404 may include the following operationsas shown in FIG. 4B.

Sub-operation 404-2: Obtain a shortest timeout time from timeout task(s)if the timeout task(s) exist(s) when the tick interrupt is executed.

Sub-operation 404-4: Determine an interval time between a correspondingsystem time after the shortest timeout period has elapsed and thecompensated system time.

Sub-operation 404-6: Set the time for the next tick interrupt accordingto the interval time.

The principles of sub-operations 404-2-404-6 are similar to those ofsub-operations 204-2-204-6 of the first embodiment, and are notdescribed in detail herein.

In implementations, sub-operation 404-6 may include the followingoperations as shown in FIG. 4C.

Sub-operation 404-6-2: Determine whether the interval time is greaterthan a time threshold.

Sub-operation 404-6-4: Set the time for the next tick interrupt to bethe time threshold if the interval time is greater than or equal to thetime threshold.

Sub-operation 404-6-6: Set the time for the next tick interrupt to bethe interval time if the timeout period is less than the time threshold.

The principles of sub-operations 404-6-2-404-6-6 are similar to those ofsub-operations 204-6-2-204-6-6 of the first embodiment, and are notdescribed in detail herein.

In implementations, sub-operation 404-4 may include the followingoperations as shown in FIG. 4D.

Sub-operation 404-4-2: Obtain a system timeout time corresponding to thesystem time according to the shortest timeout period.

Sub-operation 404-4-4: Subtract the system timeout time by thecompensated system time to obtain the interval time.

The principles of sub-operations 404-4-2-404-4-4 are similar to those ofsub-operations S221-S222 of the first embodiment, and are not describedin detail herein.

In implementations, a count address corresponding to the time thresholdis not greater than a total count address of a clock source counter.

In implementations, the method may further include: setting a time for afirst tick interrupt to be the time threshold when the system isinitialized.

In implementations, operation 406 may include the following operationsin as shown in FIG. 4E.

Sub-operation 406-2: Correct, when the system enters into the low powermode after the tick interrupt is executed and when a new timeout taskexists and a corresponding timeout period is shorter than the shortesttime of original timeout tasks, the time for the next tick interruptaccording to the shortest time of the new timeout task.

Sub-operation 406-4: Maintain the time for the next tick interrupt whena new timeout task exists and a corresponding timeout period is notshorter than the shortest time of original timeout tasks, or when no newtimeout task exists.

The principles of sub-operations 406-2-406-4 are similar to those ofsub-operations 206-2-206-4 of the first embodiment, and are notdescribed in detail herein.

In implementations, operation 402 may include the following operationsin as shown in FIG. 4F.

Sub-operation 402-2: Obtain a number of sleep ticks of a tick counterfor the system time during a previous sleep, and a count value of aclock source counter that has elapsed from a previous sleep time to acurrent time.

Sub-operation 402-4: Convert the count value of the clock source counterto a number of compensation ticks and add the number of sleep ticks tothe number of compensation ticks to obtain a number of ticks for thecurrent system time.

The principles of sub-operations 402-2-402-4 are similar to those ofsub-operations 202-2-202-4 of the first embodiment, and are notdescribed in detail herein.

In implementations, the method further includes: setting the time forthe next tick interrupt to be the time threshold if no timeout taskexists when the tick interrupt is executed.

The principles of the operations of the embodiment of the presentdisclosure are similar to those of the first embodiment, and are not bedescribed in detail herein.

The above embodiment has the following advantages.

First, the entire solution is configured for tick interrupts of asystem. Therefore, the present disclosure decouples the tick interruptsof the system from Idle tasks. As such, any wake-ups caused byinterrupts other than tick interrupts will not trigger such action oftime compensation.

Second, relative to the solution of setting a time for a next tickinterrupt in an Idle task, the Idle task can only control a tickinterrupt in a current task cycle. For example, Idle1 in FIG. 1 can onlycontrol such tick interrupt of T1 at a start moment of Task B, andcannot control tick interrupts in the entire system globally. Thepresent disclosure for tick interrupts is a system-level dynamic ticksolution, which control tick interrupts of the entire system.

Moreover, as compared with the existing technologies, a process of timecompensation in an Idle task involves the Idle task, a CPU and othertasks, having a very complicated processing logic. As such, a statementof execution is complicated, and an execution time is long. Furthermore,because preemption is turned off, Idle tasks are the lowestpriority-level tasks, and therefore high-priority-level tasks are notscheduled, which affects real-time performance. A tick interrupt of thepresent disclosure is decoupled from an Idle task, and a timecompensation is made in the tick interrupt, instead of performing thetime compensation in the Idle task, having a simple processing logic.Therefore, the process of compensation in implementations is simple, andpreemption is not turned off, having a low real-time impact.

Third Embodiment

Referring to FIG. 5, a schematic structural diagram of a tick interrupttime setting apparatus is shown. The apparatus may specifically includethe following modules.

A compensation module 502 is configured to compensate a system time whena tick interrupt is executed.

A first interrupt setting module 504 is configured to set a time of anext tick interrupt according to a timeout task and a compensated systemtime if the timeout task exists when the tick interrupt is executed.

An interrupt correction module 506 is configured to correct, when asystem enters into a low power mode after the tick interrupt isexecuted, the time of the next tick interrupt according to the timeouttask that is updated when the low power mode is entered.

In implementations, the first interrupt setting module 504 includes:

a timeout period acquisition sub-module 508 configured to obtain ashortest timeout period from among timeout task(s) if the timeouttask(s) exist(s) when the tick interrupt is executed;

an interval determination sub-module 510 configured to determine aninterval time between a corresponding system time after the shortesttimeout period has elapsed and the compensated system time; and

a setting sub-module 512 configured to set the time for the next tickinterrupt according to the interval time.

In implementations, the setting sub-module 512 includes:

a threshold determination unit 514 configured to determine whether theinterval time is greater than a time threshold;

a first setting unit 516 configured to set the time for the next tickinterrupt to be the time threshold if the interval time is greater thanor equal to the time threshold; and

a second setting unit 518 configured to set the time for the next tickinterrupt to be the interval time if the timeout period is less than thetime threshold.

In implementations, the interval determination sub-module 510 includes:

a conversion unit 520 configured to obtain a system timeout timecorresponding to the system time according to the shortest timeoutperiod; and

an interval acquisition unit 522 configured to subtract the systemtimeout time by the compensated system time to obtain the interval time.

In implementations, a count address corresponding to the time thresholdis not greater than a total count address of a clock source counter.

In implementations, the apparatus 500 may also include:

an initial setting module 524 configured to set a time for a first tickinterrupt as the time threshold when the system is initialized.

In implementations, the interrupt correction module 506 includes:

a correction sub-module 526 configured to correct, when the systementers into the low power mode after the tick interrupt is executed andwhen a new timeout task exists and a corresponding timeout period isshorter than the shortest time of original timeout tasks, the time forthe next tick interrupt according to the shortest time of the newtimeout task; and

a maintenance sub-module 528 configured to maintain the time for thenext tick interrupt when a new timeout task exists and a correspondingtimeout period is not shorter than the shortest time of original timeouttasks, or when no new timeout task exists.

In implementations, the compensation module 502 may include:

a timing acquisition sub-module 530 configured to obtain a number ofsleep ticks of a tick counter for the system time during a previoussleep, and a count value of a clock source counter that has elapsed froma previous sleep time to a current time; and

a compensation sub-module 532 configured to convert the count value ofthe clock source counter to a number of compensation ticks and addingthe number of sleep ticks to the number of compensation ticks to obtaina number of ticks for the current system time.

In implementations, the apparatus 500 may further include:

a second interrupt setting module 534 configured to set the time for thenext tick interrupt as the time threshold if no timeout task exists whenthe tick interrupt is executed.

In implementations, the apparatus 500 may further include one or moreprocessors 536, a memory 538, an input/output (I/O) interface 540, and anetwork interface 542.

The memory 538 may include a form of processor-readable media such as avolatile memory, a random access memory (RAM) and/or a non-volatilememory, for example, a read-only memory (ROM) or a flash RAM. The memory538 is an example of a processor readable media.

The processor-readable media may include a volatile or non-volatiletype, a removable or non-removable media, which may achieve storage ofinformation using any method or technology. The information may includea machine-readable instruction, a data structure, a program module orother data. Examples of processor-readable media include, but notlimited to, phase-change memory (PRAM), static random access memory(SRAM), dynamic random access memory (DRAM), other types ofrandom-access memory (RAM), read-only memory (ROM), electronicallyerasable programmable read-only memory (EEPROM), quick flash memory orother internal storage technology, compact disk read-only memory(CD-ROM), digital versatile disc (DVD) or other optical storage,magnetic cassette tape, magnetic disk storage or other magnetic storagedevices, or any other non-transmission media, which may be used to storeinformation that may be accessed by a computing device. As definedherein, the processor-readable media does not include transitory media,such as modulated data signals and carrier waves.

In implementations, the memory 538 may include program modules 544 andprogram data 546. The program modules 544 may include one or moremodules as described in the foregoing description and shown in FIG. 5.

In implementations, an apparatus is further provided, and includes: oneor more processors; and one or more computer readable media storinginstructions that, when executed by the one or more processors, causethe apparatus to perform a method including the following:

performing a compensation for a system time when a tick interrupt isexecuted;

setting a time of a next tick interrupt according to a timeout task anda compensated system time if the timeout task exists when the tickinterrupt is executed; and

when a system enters into a low power mode after the tick interrupt isexecuted, correcting the time of the next tick interrupt according tothe timeout task that is updated when the low power mode is entered.

Apparently, it is also possible to perform other operations involved inthe first embodiment, and specific operations that are performed mayrefer to the description of corresponding operations of the embodiment.

In implementations, one or more computer readable media storinginstructions that, when executed by one or more processors, cause adevice to perform the tick interrupt time setting method of the firstembodiment, are also provided.

In implementations, an apparatus is further provided, and includes: oneor more processors; and in one or more computer readable media storinginstructions that, when executed by the one or more processors, causethe apparatus to perform a method including the following:

performing a compensation for a system time when a tick interrupt isexecuted; and

setting a time for a next tick interrupt according to a timeout task anda compensated system time is the timeout task exists when the tickinterrupt is executed.

Apparently, it is also possible to perform other operations involved inthe second embodiment, and specific operations that are performed mayrefer to the description of corresponding operations of the embodiment.

In implementations, one or more computer readable media storinginstructions that, when executed by one or more processors, cause adevice to perform the tick interrupt time setting method of the secondembodiment, are also provided.

Fourth Embodiment

Referring to FIG. 6, a schematic structural diagram of a tick interrupttime setting apparatus 600 is shown. The apparatus 600 may include thefollowing modules:

a compensation module 602 configured to perform a compensation for asystem time when a tick interrupt is executed; and

a first interrupt setting module 604 configured to set a time for a nexttick interrupt according to a timeout task and a compensated system timeis the timeout task exists when the tick interrupt is executed.

In implementations, the apparatus 600 further includes: an interruptcorrection module 606 configured to correct, when a system enters into alow power mode after the tick interrupt is executed, the time of thenext tick interrupt according to the timeout task that is updated whenthe low power mode is entered.

In implementations, the apparatus 600 may further include one or moreprocessors 608, a memory 610, an input/output (I/O) interface 612, and anetwork interface 614. The memory 610 may include a form ofprocessor-readable media as described in the foregoing description. Inimplementations, the memory 610 may include program modules 616 andprogram data 618. The program modules 616 may include one or moremodules as described in the foregoing description and shown in FIG. 6.In implementations, the apparatus 600 may further include one or moreother modules in FIG. 5.

For specific implementations of each module in the second embodiment,the description of operations in the first embodiment corresponding tothe modules can be referenced, and details thereof are not describedherein again.

From the above description of the embodiments, one skilled in the artcan clearly understand that the present disclosure can be implemented bymeans of software plus a necessary general hardware platform. Based onsuch understanding, the essence of the technical solutions of thepresent disclosure or the parts that make contributions to the existingtechnologies may be embodied in a form of a software product. Suchcomputer software product may be stored in a storage medium, such as aROM/RAM, a magnetic disk, an optical disk, etc., and includesinstructions for causing a computing device (which may be a personalcomputer, a server, or a network device, etc.) to perform the methodsdescribed in various embodiments or certain portions of the embodimentsof the present disclosure.

The various embodiments in the specification are described in aprogressive manner, and same or similar parts between the variousembodiments may be referenced to each other. Each embodiment focuses onaspects that are different from those of the other embodiments. Inparticular, due to their substantially similarities to the methodembodiments, the description of the systems or system embodiments isrelatively simple, and related parts can be referenced to thedescription of the method embodiments. The systems and systemembodiments described above are merely illustrative. The units describedtherein as separate components may or may not be physically separate,and the components displayed as units may or may not be physical units,i.e., can be located in a single place, or can be distributed amongmultiple network units. Some or all of the modules may be selectedaccording to actual needs to achieve the purpose of the solutions of theembodiments. One of ordinary skill in the art can understand and performimplementations without making any creative effort.

The methods, apparatuses, devices and storage media for setting a timefor a tick interrupt provided by the present disclosure are described indetail above. The principles and manners of implementations of thepresent disclosure are described using specific examples. Thedescription of the above embodiments is merely used for facilitating theunderstanding of the present disclosure and its core idea. Furthermore,for those skilled in the art, there could be changes in the specificembodiments and application scopes according to the ideas of the presentdisclosure. In summary, the content of the present specification shouldnot be construed as limitations to the present disclosure.

The present disclosure can be further understood using the followingclauses.

Clause 1: A tick interrupt time setting method comprising: performing acompensation for a system time when a tick interrupt is executed;setting a time for a next tick interrupt according to a timeout task anda compensated system time if the timeout task exists when the tickinterrupt is executed; and correcting, when a system enters into a lowpower mode after the tick interrupt is executed, the time for the nexttick interrupt according to the timeout task that is updated when thelow power mode is entered.

Clause 2: The method of Clause 1, wherein setting the time for the nexttick interrupt according to the timeout task and the compensated systemtime if the timeout task exists when the tick interrupt is executedcomprises: obtaining a shortest timeout time from timeout task(s) if thetimeout task(s) exist(s) when the tick interrupt is executed;determining an interval time between a corresponding system time afterthe shortest timeout period has elapsed and the compensated system time;and setting the time for the next tick interrupt according to theinterval time.

Clause 3: The method of Clause 2, wherein setting the time for the nexttick interrupt according to the interval time comprises: determiningwhether the interval time is greater than a time threshold; setting thetime for the next tick interrupt to be the time threshold if theinterval time is greater than or equal to the time threshold; andsetting the time for the next tick interrupt to be the interval time ifthe timeout period is less than the time threshold.

Clause 4: The method of Clause 2, wherein determining the interval timebetween the corresponding system time after the shortest timeout periodhas elapsed and the compensated system time comprises: obtaining asystem timeout time corresponding to the system time according to theshortest timeout period; and subtracting the system timeout time by thecompensated system time to obtain the interval time.

Clause 5: The method of Clause 3, wherein a count address correspondingto the time threshold is not greater than a total count address of aclock source counter.

Clause 6: The method of Clause 3, further comprising: setting a time fora first tick interrupt to be the time threshold when the system isinitialized.

Clause 7: The method of Clause 1, wherein correcting, when the systementers into the low power mode after the tick interrupt is executed, thetime for the next tick interrupt according to the timeout task that isupdated when the low power mode is entered, comprises: correcting, whenthe system enters into the low power mode after the tick interrupt isexecuted and when a new timeout task exists and a corresponding timeoutperiod is shorter than the shortest time of original timeout tasks, thetime for the next tick interrupt according to the shortest time of thenew timeout task; and maintaining the time for the next tick interruptwhen a new timeout task exists and a corresponding timeout period is notshorter than the shortest time of original timeout tasks, or when no newtimeout task exists.

Clause 8: The method of Clause 1, wherein performing the compensationfor the system time when the tick interrupt is executed comprises:obtaining a number of sleep ticks of a tick counter for the system timeduring a previous sleep, and a count value of a clock source counterthat has elapsed from a previous sleep time to a current time; andconverting the count value of the clock source counter to a number ofcompensation ticks and adding the number of sleep ticks to the number ofcompensation ticks to obtain a number of ticks for the current systemtime.

Clause 9: The method of Clause 1, further comprising: setting the timefor the next tick interrupt to be the time threshold if no timeout taskexists when the tick interrupt is executed.

Clause 10: A tick interrupt time setting method comprising: performing acompensation for a system time when a tick interrupt is executed; andsetting a time for a next tick interrupt according to a timeout task anda compensated system time is the timeout task exists when the tickinterrupt is executed.

Clause 11: A tick interrupt time setting apparatus comprising: acompensation module configured to perform a compensation for a systemtime when a tick interrupt is executed; a first interrupt setting moduleconfigured to set a time for a next tick interrupt according to atimeout task and a compensated system time if the timeout task existswhen the tick interrupt is executed; and an interrupt correction moduleconfigured to correct, when a system enters into a low power mode afterthe tick interrupt is executed, the time for the next tick interruptaccording to the timeout task that is updated when the low power mode isentered.

Clause 12: The apparatus of Clause 11, wherein the first interruptsetting module comprises: a timeout period acquisition sub-moduleconfigured to obtain a shortest timeout period from among timeouttask(s) if the timeout task(s) exist(s) when the tick interrupt isexecuted; an interval determination sub-module configured to determinean interval time between a corresponding system time after the shortesttimeout period has elapsed and the compensated system time; and asetting sub-module configured to set the time for the next tickinterrupt according to the interval time.

Clause 13: The apparatus of Clause 12, wherein the setting sub-modulecomprises: a threshold determination unit configured to determinewhether the interval time is greater than a time threshold; a firstsetting unit configured to set the time for the next tick interrupt tobe the time threshold if the interval time is greater than or equal tothe time threshold; and a second setting unit configured to set the timefor the next tick interrupt to be the interval time if the timeoutperiod is less than the time threshold.

Clause 14: The apparatus of Clause 12, wherein the intervaldetermination sub-module comprises: a conversion unit configured toobtain a system timeout time corresponding to the system time accordingto the shortest timeout period; and an interval acquisition unitconfigured to subtract the system timeout time by the compensated systemtime to obtain the interval time.

Clause 15: The apparatus of Clause 13, wherein a count addresscorresponding to the time threshold is not greater than a total countaddress of a clock source counter.

Clause 16: The apparatus of Clause 13, further comprising: an initialsetting module configured to set a time for a first tick interrupt asthe time threshold when the system is initialized.

Clause 17: The apparatus of Clause 11, wherein the interrupt correctionmodule comprises: a correction sub-module configured to correct, whenthe system enters into the low power mode after the tick interrupt isexecuted and when a new timeout task exists and a corresponding timeoutperiod is shorter than the shortest time of original timeout tasks, thetime for the next tick interrupt according to the shortest time of thenew timeout task; and a maintenance sub-module configured to maintainthe time for the next tick interrupt when a new timeout task exists anda corresponding timeout period is not shorter than the shortest time oforiginal timeout tasks, or when no new timeout task exists.

Clause 18: The apparatus of Clause 11, wherein the compensation modulecomprises: a timing acquisition sub-module configured to obtain a numberof sleep ticks of a tick counter for the system time during a previoussleep, and a count value of a clock source counter that has elapsed froma previous sleep time to a current time; and a compensation sub-moduleconfigured to convert the count value of the clock source counter to anumber of compensation ticks and adding the number of sleep ticks to thenumber of compensation ticks to obtain a number of ticks for the currentsystem time.

Clause 19: The apparatus of Clause 11, further comprising: a secondinterrupt setting module configured to set the time for the next tickinterrupt as the time threshold if no timeout task exists when the tickinterrupt is executed.

Clause 20: A tick interrupt time setting apparatus comprising: acompensation module configured to perform a compensation for a systemtime when a tick interrupt is executed; and a first interrupt settingmodule configured to set a time for a next tick interrupt according to atimeout task and a compensated system time is the timeout task existswhen the tick interrupt is executed.

Clause 21: A processing device comprising: one or more processors; andone or more computer readable media storing instructions that, whenexecuted by the one or more processors, cause the device to perform oneor more methods of Clauses 1-10.

Clause 22: One or more computer readable media storing instructionsthat, when executed by one or more processors, cause a device to performone or more methods of Clauses 1-10.

The invention claimed is:
 1. A method implemented by one or morecomputing devices, the method comprising: performing a compensation fora system time when a tick interrupt is executed; setting a time for anext tick interrupt according to a timeout task and a compensated systemtime if the timeout task exists when the tick interrupt is executed; andcorrecting, when a system enters into a low power mode after the tickinterrupt is executed, the time for the next tick interrupt according tothe timeout task that is updated when the low power mode is entered. 2.The method of claim 1, wherein setting the time for the next tickinterrupt according to the timeout task and the compensated system timeif the timeout task exists when the tick interrupt is executedcomprises: obtaining a shortest timeout time from timeout task(s) if thetimeout task(s) exist(s) when the tick interrupt is executed;determining an interval time between a corresponding system time afterthe shortest timeout period has elapsed and the compensated system time;and setting the time for the next tick interrupt according to theinterval time.
 3. The method of claim 2, wherein setting the time forthe next tick interrupt according to the interval time comprises:determining whether the interval time is greater than a time threshold;setting the time for the next tick interrupt to be the time threshold ifthe interval time is greater than or equal to the time threshold; andsetting the time for the next tick interrupt to be the interval time ifthe timeout period is less than the time threshold.
 4. The method ofclaim 2, wherein determining the interval time between the correspondingsystem time after the shortest timeout period has elapsed and thecompensated system time comprises: obtaining a system timeout timecorresponding to the system time according to the shortest timeoutperiod; and subtracting the system timeout time by the compensatedsystem time to obtain the interval time.
 5. The method of claim 3,wherein a count address corresponding to the time threshold is notgreater than a total count address of a clock source counter.
 6. Themethod of claim 3, further comprising: setting a time for a first tickinterrupt to be the time threshold when the system is initialized. 7.The method of claim 1, wherein correcting, when the system enters intothe low power mode after the tick interrupt is executed, the time forthe next tick interrupt according to the timeout task that is updatedwhen the low power mode is entered, comprises: correcting, when thesystem enters into the low power mode after the tick interrupt isexecuted and when a new timeout task exists and a corresponding timeoutperiod is shorter than the shortest time of original timeout tasks, thetime for the next tick interrupt according to the shortest time of thenew timeout task; and maintaining the time for the next tick interruptwhen a new timeout task exists and a corresponding timeout period is notshorter than the shortest time of original timeout tasks, or when no newtimeout task exists.
 8. The method of claim 1, wherein performing thecompensation for the system time when the tick interrupt is executedcomprises: obtaining a number of sleep ticks of a tick counter for thesystem time during a previous sleep, and a count value of a clock sourcecounter that has elapsed from a previous sleep time to a current time;and converting the count value of the clock source counter to a numberof compensation ticks and adding the number of sleep ticks to the numberof compensation ticks to obtain a number of ticks for the current systemtime.
 9. The method of claim 1, further comprising: setting the time forthe next tick interrupt to be the time threshold if no timeout taskexists when the tick interrupt is executed.
 10. An apparatus comprising:one or more processors; memory; a compensation module stored in thememory and executable by the one or more processors to perform acompensation for a system time when a tick interrupt is executed; afirst interrupt setting module stored in the memory and executable bythe one or more processors to set a time for a next tick interruptaccording to a timeout task and a compensated system time if the timeouttask exists when the tick interrupt is executed; and an interruptcorrection module stored in the memory and executable by the one or moreprocessors to correct, when a system enters into a low power mode afterthe tick interrupt is executed, the time for the next tick interruptaccording to the timeout task that is updated when the low power mode isentered.
 11. The apparatus of claim 10, wherein the first interruptsetting module comprises: a timeout period acquisition sub-moduleconfigured to obtain a shortest timeout period from among timeouttask(s) if the timeout task(s) exist(s) when the tick interrupt isexecuted; an interval determination sub-module configured to determinean interval time between a corresponding system time after the shortesttimeout period has elapsed and the compensated system time; and asetting sub-module configured to set the time for the next tickinterrupt according to the interval time.
 12. The apparatus of claim 11,wherein the setting sub-module comprises: a threshold determination unitconfigured to determine whether the interval time is greater than a timethreshold; a first setting unit configured to set the time for the nexttick interrupt to be the time threshold if the interval time is greaterthan or equal to the time threshold; and a second setting unitconfigured to set the time for the next tick interrupt to be theinterval time if the timeout period is less than the time threshold. 13.The apparatus of claim 11, wherein the interval determination sub-modulecomprises: a conversion unit configured to obtain a system timeout timecorresponding to the system time according to the shortest timeoutperiod; and an interval acquisition unit configured to subtract thesystem timeout time by the compensated system time to obtain theinterval time.
 14. The apparatus of claim 12, wherein a count addresscorresponding to the time threshold is not greater than a total countaddress of a clock source counter.
 15. The apparatus of claim 12,further comprising: an initial setting module configured to set a timefor a first tick interrupt as the time threshold when the system isinitialized.
 16. The apparatus of claim 10, wherein the interruptcorrection module comprises: a correction sub-module configured tocorrect, when the system enters into the low power mode after the tickinterrupt is executed and when a new timeout task exists and acorresponding timeout period is shorter than the shortest time oforiginal timeout tasks, the time for the next tick interrupt accordingto the shortest time of the new timeout task; and a maintenancesub-module configured to maintain the time for the next tick interruptwhen a new timeout task exists and a corresponding timeout period is notshorter than the shortest time of original timeout tasks, or when no newtimeout task exists.
 17. The apparatus of claim 10, wherein thecompensation module comprises: a timing acquisition sub-moduleconfigured to obtain a number of sleep ticks of a tick counter for thesystem time during a previous sleep, and a count value of a clock sourcecounter that has elapsed from a previous sleep time to a current time;and a compensation sub-module configured to convert the count value ofthe clock source counter to a number of compensation ticks and addingthe number of sleep ticks to the number of compensation ticks to obtaina number of ticks for the current system time.
 18. The apparatus ofclaim 10, further comprising: a second interrupt setting moduleconfigured to set the time for the next tick interrupt as the timethreshold if no timeout task exists when the tick interrupt is executed.19. One or more processor-readable media storing executable instructionsthat, when executed by one or more processors, cause the one or moreprocessors to perform acts comprising: performing a compensation for asystem time when a tick interrupt is executed; and setting a time for anext tick interrupt according to a timeout task and a compensated systemtime is the timeout task exists when the tick interrupt is executed; andcorrecting, when a system enters into a low power mode after the tickinterrupt is executed, the time for the next tick interrupt according tothe timeout task that is updated when the low power mode is entered.